Printed circuit board

ABSTRACT

A printed circuit board having an insulating layer; circuit patterns formed on both surfaces of the insulating layer in order to be embedded in the insulating layer; and a bump formed to pass through the insulating layer in order to electrically connect the circuit patterns formed on both surfaces of the insulating layer.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a U.S. divisional application filed under 37 USC1.53(b) claiming priority benefit of U.S. Ser. No. 12/073,712 filed inthe United States on Mar. 7, 2008, which claims earlier priority benefitto Korean Patent Application Nos. 10-2007-0052162, filed on May 29,2007, entitled “Fabricating Method of Printed Circuit Board” and10-2007-0121026, filed on Nov. 26, 2007, entitled “Printed circuit boardand method for fabricating thereof”, which are hereby incorporated byreference in their entirety into this application.

BACKGROUND

1. Field

The present invention relates, in general, to a printed circuit board(PCB) and a method of fabricating the same, and more particularly, to aPCB and a method of fabricating the same, in which the thickness of acircuit pattern is decreased to thus realize a fine circuit, the circuitpattern is embedded in an insulating layer to thus decrease thethickness of a PCB, and the time and cost required for the process offabricating a PCB are decreased.

2. Description of the Related Art

According to the trend in which an electronic product is fabricated tobe light, slim, short and small and to have multiple functions, apackage mounted to the electronic product need be thin. Thus, asubstrate, which is an important component of the package, is requiredto be thin and to have high density.

FIGS. 1A to 1D are sectional views sequentially illustrating the processof fabricating a PCB according to a conventional technique.

As illustrated in FIG. 1A, a metal layer laminate 100, in which a metallayer 104 is laminated on both surfaces of an insulating layer 102, isprepared.

Next, as illustrated in FIG. 1B, a via hole 106 is formed through themetal layer laminate by drilling.

After the formation of the via hole 106, an electroless copper platinglayer 108 and a copper electroplating layer 110 are formed on the innerwall of the via hole 106 and on the metal layer 104 through electrolesscopper plating and copper electroplating, as illustrated in FIG. 1C.

After the formation of the electroless copper plating layer 108 and thecopper electroplating layer 110, a dry film (not shown) is applied onthe copper electroplating layer 110, and the portion of the dry filmother than the portion of the dry film corresponding to a circuitpattern is removed through exposure and development.

Next, the copper electroplating layer 110, exposed by removing theportion of the dry film, the electroless copper plating layer 108, andthe metal layer 104 are etched using an etchant, thus forming a circuitpattern 112 on both surfaces of the insulating layer 102, as illustratedin FIG. 1D.

However, the method of fabricating the PCB according to the conventionaltechnique is disadvantageous because the circuit pattern 112, composedof the metal layer 104, the electroless copper plating layer 108, andthe copper electroplating layer 110, is formed on both surfaces of theinsulating layer 102, and thus the circuit pattern 110 is thick, andalso, the circuit pattern 112 is formed to be exposed on both surfacesof the insulating layer 102, undesirably increasing the thickness of thePCB.

Further, the method of fabricating the PCB according to the conventionaltechnique is disadvantageous because the circuit pattern 112 is composedof the metal layer 104, the electroless copper plating layer 108 and thecopper electroplating layer 110, and thus, upon the formation of thecircuit pattern 112, the over-etching of the outer portion of thecircuit pattern 112 or the under-etching of the inner portion of thecircuit pattern 112 may occur, making it difficult to realize apredetermined width, that is, a pitch, between adjacent circuitpatterns, with the result that a fine circuit is not realized.

Furthermore, the method of fabricating the PCB according to theconventional technique is disadvantageous because the circuit pattern isformed using electroless copper plating and copper electroplating,undesirably increasing the time required for the process of fabricatinga PCB.

SUMMARY

Therefore, the present invention provides a PCB and a method offabricating the same, in which the thickness of a circuit pattern isdecreased, thus realizing a fine circuit, and the circuit pattern isembedded in an insulating layer, thus decreasing the thickness of thePCB.

In addition, the present invention provides a PCB and a method offabricating the same, in which the time and cost required for theprocess of fabricating a PCB are decreased.

According to the present invention, a PCB may include an insulatinglayer; circuit patterns formed on both surfaces of the insulating layerin order to be embedded in the insulating layer; and a bump formed topass through the insulating layer in order to electrically connect thecircuit patterns formed on both surfaces of the insulating layer.

In the PCB according to the present invention, the circuit patterns andthe insulating layer may be adhered using an adhesive.

In the PCB according to the present invention, the adhesive may have aglass transition temperature lower than that of the insulating layer.

In addition, according to the present invention, a method of fabricatinga PCB may include a) forming a bump on a first metal layer; b)laminating an insulating layer on the bump so that the bumps passesthrough the insulating layer; c) placing a second metal layer on theinsulating layer and then conducting heating and pressing, thuslaminating the second metal layer on the insulating layer; d) etchingthe first metal layer and the second metal layer, thus forming circuitpatterns on both surfaces of the insulating layer; and e) heating andpressing both surfaces of the insulating layer, thus embedding thecircuit patterns in the insulating layer.

In the method of fabricating the PCB according to the present invention,the a) may include a-1) preparing the first metal layer; a-2) placing amask having a hole on the first metal layer to be in close contacttherewith, in which the hole is formed at a position corresponding to anarea to which the bump is to be formed; a-3) filling the hole with aconductive paste using a squeegee; a-4) removing the mask; and a-5)drying the conductive paste, thus forming the bump.

In the method of fabricating the PCB according to the present invention,the c) may be conducted by heating and pressing both surfaces of the PCBunder conditions of 50˜150° C. and 1˜30 kgf/cm².

In the method of fabricating the PCB according to the present invention,the e) may be conducted by heating and pressing the circuit patternsunder conditions of temperature and pressure which are higher than inthe c), thus embedding the circuit patterns in the insulating layer.

In the method of fabricating the PCB according to the present invention,the e) may be conducted by heating and pressing the circuit patternsunder conditions of 150˜300° C. and 30˜50 kgf/cm².

In the method of fabricating the PCB according to the present invention,the b) may include b-1) applying an adhesive on both surfaces of theinsulating layer; and b-2) laminating the insulating layer having theadhesive applied on both surfaces thereof on the bump so that the bumppasses through the adhesive and the insulating layer.

In the method of fabricating the PCB according to the present invention,the c) may include melting the adhesive using heat applied to bothsurfaces of the PCB to thus adhere the first metal layer and the secondmetal layer to both surfaces of the insulating layer.

In the method of fabricating the PCB according to the present invention,the e) may include curing the insulating layer and the adhesive.

BRIEF DESCRIPTION OF THE DRAWINGS

The features and advantages of the present invention will be moreclearly understood from the following detailed description taken inconjunction with the accompanying drawings, in which:

FIGS. 1A to 1D are sectional views sequentially illustrating the processof fabricating a PCB according to a conventional technique;

FIG. 2 is a view illustrating the PCB according to the presentinvention;

FIGS. 3A to 3F are sectional views sequentially illustrating the processof fabricating a PCB according to a first embodiment of the presentinvention; and

FIGS. 4A to 4F are sectional views sequentially illustrating the processof fabricating a PCB according to a second embodiment of the presentinvention.

DESCRIPTION OF EMBODIMENTS

Hereinafter, a detailed description will be given of the preferredembodiments of the present invention, with reference to the appendeddrawings.

FIG. 2 is a view illustrating the PCB according to the presentinvention.

With reference to FIG. 2, the PCB according to the present inventionincludes an insulating layer 6, circuit patterns 10 a, 10 b formed onboth surfaces of the insulating layer 6 in order to be embedded in theinsulating layer, and bumps 4 formed to pass through the insulatinglayer 6 in order to electrically connect the circuit patterns 10 a, 10 bformed on both surfaces of the insulating layer 6.

The insulating layer 6 is formed of an epoxy resin, and plays a role inelectrically isolating the circuit patterns 10 a, 10 b formed on bothsurfaces thereof.

The circuit patterns 10 a, 10 b are formed on both surfaces of theinsulating layer 6 so that they are embedded in the insulating layer 6.

The circuit patterns 10 a, 10 b are formed from a metal layer.

The insulating layer 6 and the circuit patterns 10 a, 10 b are adheredusing an epoxy-based adhesive having Tg (glass transition temperature)lower than that of the insulating layer 6.

The bumps 4 are formed to pass through the insulating layer 6, thuselectrically connecting the circuit patterns 10 a, 10 b, which areformed on both sides of the insulating layer 6.

FIGS. 3A to 3F are sectional views sequentially illustrating the processof fabricating a PCB according to a first embodiment of the presentinvention.

As illustrated in FIG. 3A, a first metal layer 2 is prepared.

As the first metal layer 2, a copper foil is used.

Next, bumps 4 are formed on the first metal layer 2, as illustrated inFIG. 3B.

Useful for interlayer connection, the bumps 4 are formed by placing amask having holes on the first metal layer 2 to be in close contacttherewith, in which the holes are formed at positions corresponding toareas to which the bumps 4 are to be formed, printing a conductive pasteusing a squeegee to thus fill the holes with the conductive paste, andthen removing the mask.

Because the conductive paste has high viscosity, when the conductivepaste is printed and is then dried, the bumps 4 are formed.

When the bumps 4 are formed, the printing and drying of the conductivepaste are repeated several times (e.g., three or four times), thusadjusting the height of the bumps 4.

After the formation of the bumps 4, an insulating layer 6 is laminatedon the bumps 4, as illustrated in FIG. 3C.

As the insulating layer 6, a prepreg or an epoxy resin in a semi-curedstate is used, and the insulating layer 6 is laminated on the bumps 4 sothat the bumps 4 pass through the insulating layer 6.

After the lamination of the insulating layer 6, a second metal layer 8is placed on the insulating layer 6, and is then heated and pressedusing a first press, by which the second metal layer 8, for example, acopper foil, is laminated on the insulating layer 6, as illustrated inFIG. 3D.

As such, the insulating layer 6 is maintained in a semi-cured state.

When the second metal layer 8 is laminated using the first press, bothsurfaces of the PCB, that is, the first metal layer 2 and the secondmetal layer 8, are heated and pressed under conditions of 50˜150° C. and1˜30 kgf/cm², by which the second metal layer 8 is laminated on theinsulating layer 6.

After the lamination of the second metal layer 8, a dry film (not shown)is applied on the first metal layer 2 and the second metal layer 8, andthe portion of the dry film other than the portion of the dry filmcorresponding to a circuit pattern is removed through exposure anddevelopment.

Next, the first metal layer 2 and the second metal layer 8 are etchedusing an etchant, thus forming circuit patterns 10 a, 10 b on bothsurfaces of the insulating layer 6, as illustrated in FIG. 3E.

After the formation of the circuit patterns 10 a, 10 b, the dry film,remaining on the circuit patterns 10 a, 10 b, is removed.

Next, the PCB having the circuit patterns 10 a, 10 b is heated andpressed using a second press, thus embedding the circuit patterns 10 a,10 b in the insulating layer 6.

As such, the outer surfaces of the circuit patterns 10 a, 10 b are flushwith the insulating layer 6.

Specifically, the circuit patterns 10 a, 10 b are embedded in theinsulating layer 6 so that the outer surfaces of the circuit patterns 10a, 10 b embedded in the insulating layer 6 are flush with the surface ofthe insulating layer 6.

The circuit patterns 10 a, 10 b are heated and pressed using the secondpress under conditions of 150˜300° C. and 30˜50 kgf/cm², which arehigher than when using the first press, thus embedding the circuitpatterns 10 a, 10 b in the insulating layer 6.

As such, the insulating layer 6 in a semi-cured state is cured.

In the method of fabricating the PCB according to the first embodimentof the present invention using B2it (Buried Bump InterconnectionTechnology), because the circuit patterns 10 a, 10 b are composedexclusively of the metal layers 2, 8, the thickness of the circuitpatterns 10 a, 10 b may be decreased. Hence, when the metal layers 2, 8are etched to form the circuit patterns 10 a, 10 b, it is possible toprevent the over-etching of the outer portions of the circuit patterns10 a, 10 b and the under-etching of the inner portions of the circuitpatterns 10 a, 10 b, thereby realizing a fine circuit.

In the method of fabricating the PCB according to the first embodimentof the present invention, the circuit patterns 10 a, 10 b are embeddedin the insulating layer 6, thus decreasing the thickness of the PCB.

In the method of fabricating the PCB according to the first embodimentof the present invention, electroless copper plating and copperelectroplating are not conducted upon the formation of the circuitpatterns 10 a, 10 b, thus decreasing the time and cost required for theprocess of fabricating the PCB.

FIGS. 4A to 4F are sectional views sequentially illustrating the processof fabricating a PCB according to a second embodiment of the presentinvention.

As illustrated in FIG. 4A, a first metal layer 22 is prepared.

As the first metal layer 22, a copper foil is used.

Next, bumps 24 are formed on the first metal layer 22, as illustrated inFIG. 4B.

Useful for interlayer connection, the bumps 24 are formed by placing amask having holes on the first metal layer 22 to be in close contacttherewith, in which the holes are formed at positions corresponding toareas to which the bumps 24 are to be formed, printing a conductivepaste using a squeegee to thus fill the holes with the conductive paste,and then removing the mask.

Because the conductive paste has high viscosity, when the conductivepaste is printed and is then dried, the bumps 24 are formed.

When the bumps 24 are formed, the printing and drying of the conductivepaste are repeated several times (e.g., three or four times), thusadjusting the height of the bumps 24.

After the formation of the bumps 24, an insulating layer 26, bothsurfaces of which are coated with an adhesive 32, is laminated on thebumps 24, as illustrated in FIG. 4C.

Specifically, the adhesive 32 is applied on both surfaces of theinsulating layer 26, after which the insulating layer 26 having theadhesive 32 applied on both surfaces thereof is laminated on the bumps24.

The adhesive 32 is exemplified by an epoxy-based product having Tg lowerthan that of the insulating layer 26, in order to increase the force ofadhesion between a circuit pattern, which is subsequently formed, andthe insulating layer 26. The insulating layer 26 is formed of an epoxyresin in a semi-cured state.

In the lamination of the insulating layer 26 of FIG. 4C, the bumps 24are formed to pass through the insulating layer 26 and the adhesive 32.

After the lamination of the insulating layer 26, a second metal layer 28is placed on the insulating layer 26, and is then heated and pressedusing a first press, by which the second metal layer 28 is laminated onthe insulating layer 26, as illustrated in FIG. 4D.

As such, the insulating layer 26 is maintained in a semi-cured state.

When the second metal layer 28 is laminated using the first press, bothsurfaces of the PCB, that is, the first metal layer 22 and the secondmetal layer 28, are heated and pressed under conditions of 50˜150° C.and 1˜30 kgf/cm², by which the second metal layer 28 is laminated on theinsulating layer 26.

At this time, the adhesive 32 applied on both surfaces of the insulatinglayer 26 is melted by heat from the first press, such that the firstmetal layer 22 and the second metal layer 28 are adhered to bothsurfaces of the insulating layer 26.

The force of adhesion between the insulating layer 26 and the firstmetal layer 22 or the second metal layer 28 is increased thanks to theadhesive 32.

After the lamination of the second metal layer 28, a dry film (notshown) is applied on the first metal layer 22 and the second metal layer28, and the portion of the dry film other than the portion of the dryfilm corresponding to circuit patter electroless copper plating andcopper electroplating n is removed through exposure and development.

Next, the first metal layer 22 and the second metal layer 28 are etchedusing an etchant, thus forming circuit patterns 30 a, 30 b on bothsurfaces of the insulating layer 26, as illustrated in FIG. 4E.

After the formation of the circuit patterns 30 a, 30 b, the dry film,remaining on the circuit patterns 30 a, 30 b, is removed.

Next, the PCB having the circuit patterns 30 a, 30 b is heated andpressed using a second press, thus embedding the circuit patterns 30 a,30 b in the insulating layer 26.

As such, the outer surfaces of the circuit patterns 30 a, 30 b are flushwith the insulating layer 26.

Specifically, the circuit patterns 30 a, 30 b are embedded in theinsulating layer 26 so that the outer surfaces of the circuit patterns30 a, 30 b embedded in the insulating layer 26 are flush with thesurface of the insulating layer 26.

The circuit patterns 30 a, 30 b are heated and pressed using the secondpress under conditions of 150˜300° C. and 30˜50 kgf/cm², which arehigher than when using the first press, thus embedding the circuitpatterns 30 a, 30 b in the insulating layer 26.

As such, the insulating layer 26 in a semi-cured state and the adhesive32 applied on both surfaces of the insulating layer are cured.

In the method of fabricating the PCB according to the second embodimentof the present invention using B2it, because the circuit patterns 30 a,30 b are composed exclusively of the metal layers 22, 28, the thicknessof the circuit patterns 30 a, 30 b may be decreased. Thus, when themetal layers 22, 28 are etched to form the circuit patterns 30 a, 30 b,it is possible to prevent over-etching of the outer portions of thecircuit patterns 30 a, 30 b and under-etching of the inner portions ofthe circuit patterns 30 a, 30 b, thereby realizing a fine circuit.

In the method of fabricating the PCB according to the second embodimentof the present invention, because the insulating layer 26 and thecircuit patterns 30 a, 30 b are adhered using the adhesive 32 applied onboth surfaces of the insulating layer 26, the force of adhesion betweenthe insulating layer 26 and the circuit patterns 30 a, 30 b is greaterthan that of the PCB formed through the method of fabricating a PCBaccording to the first embodiment of the present invention.

In the method of fabricating the PCB according to the second embodimentof the present invention, the circuit patterns 30 a, 30 b are embeddedin the insulating layer 26, thus decreasing the thickness of the PCB,and furthermore, the force of adhesion between the circuit patterns 30a, 30 b and the insulating layer 26 may be increased thanks to theadhesive 32, which is applied on both surfaces of the insulating layer26.

In the method of fabricating the PCB according to the second embodimentof the present invention, electroless copper plating and copperelectroplating are not conducted upon the formation of the circuitpatterns 30 a, 30 b, thus decreasing the time and cost required for theprocess of fabricating a PCB.

As described hereinbefore, the present invention provides a PCB and amethod of fabricating the same. According to the present invention,because a circuit pattern is composed solely of a metal layer, thethickness of the circuit pattern can be decreased. Thus, when the metallayer is etched to form the circuit pattern, over-etching of the outerportion of the circuit pattern and under-etching of the inner portion ofthe circuit pattern can be prevented, thereby realizing a fine circuit.

Further, according to the present invention, because the circuit patternis embedded in an insulating layer, the thickness of the PCB can bedecreased and the force of adhesion between the circuit pattern and theinsulating layer can be increased thanks to the adhesive, which isapplied on both surfaces of the insulating layer.

Furthermore, according to the present invention, because electrolesscopper plating and copper electroplating are not conducted upon theformation of the circuit pattern, the time and cost required for theprocess of fabricating a PCB can be reduced.

Although the preferred embodiments of the present invention have beendisclosed for illustrative purposes, those skilled in the art willappreciate that various modifications, additions and substitutions arepossible within the technical spirit of the invention.

1. A printed circuit board, comprising: an insulating layer; circuitpatterns formed on both surfaces of the insulating layer in order to beembedded in the insulating layer; and a bump formed to pass through theinsulating layer in order to electrically connect the circuit patternsformed on both surfaces of the insulating layer.
 2. The printed circuitboard as set forth in claim 1, wherein the circuit patterns and theinsulating layer are adhered using an adhesive.
 3. The printed circuitboard as set forth in claim 2, wherein the adhesive has a glasstransition temperature lower than that of the insulating layer.